Integrated circuit including asymmetric ending cells and system-on-chip including the same
AssigneeSamsung Electronics Co., Ltd.
InventorsJong-kyu RYU, Min-su Kim, Dae-seong Lee
Life of this patent
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Abstract
An integrated circuit including first and second macroblocks arranged in a first direction, and a plurality of cells between the first macroblock and the second macroblock, the plurality of cells including at least one first ending cell adjacent to the first macroblock and having a first width in the first direction, at least one second ending cell adjacent to the second macroblock and having a second width different from the first width in the first direction, and at least one standard cell between the at least one first ending cell and the at least one second ending cell may be provided.
Claims23
An integrated circuit comprising:
- first and second macroblocks arranged in a first direction;
- and
- a plurality of cells between the first macroblock and the second macroblock, the plurality of cells including,
- at least one first ending cell adjacent to the first macroblock, the at least one first ending cell having a first width in the first direction,
- at least one second ending cell adjacent to the second macroblock, the at least one second ending cell having a second width different from the first width in the first direction, and
- at least one standard cell between the at least one first ending cell and the at least one second ending cell.
An integrated circuit comprising:
- first and second macroblocks arranged in a first direction;
- and
- a plurality of cells between the first macroblock and the second macroblock, the plurality of cells including,
- first ending cells adjacent to the first macroblock, the first ending cells arranged in a line in a second direction perpendicular to the first direction, each of the first ending cells having a first width in the first direction,
- second ending cells adjacent to the second macroblock, the second ending cells arranged in a line in the second direction, each of the second ending cells having the first width in the first direction, and
- center cells arranged in a line in the second direction in an area between the first ending cells and the second ending cells.
(canceled)
(canceled)
A system-on-chip comprising:
- an application processor including,
- first and second macroblocks arranged in a first direction, and
- a plurality of cells between the first and second macroblocks, the plurality of cells having,
- first ending cells adjacent to the first macroblock and arranged in a line in a second direction perpendicular to the first direction, and
- second ending cells arranged in a line in the second direction and being implemented asymmetrically to the first ending cells;
- and
- a memory electrically connected to the application processor.
-25. (canceled)
Dependencies are inferred from the claim text.