Back to results
US 2019/0057871 A1Published application
Method of forming fine line patterns of semiconductor devices
AssigneeNanya Technology Corporation
InventorShing-Yih SHIH
Life of this patent
Estimating the term…
Abstract
A method of forming fine line patterns of semiconductor devices includes: forming a plurality of lower linear core structures on at least one lower hard mask layer disposed on a target layer; forming a spacer layer on the hard mask layer to cover the lower linear core structures; forming an upper hard mask layer on the spacer layer; thinning the upper hard mask layer to expose potions of the spacer layer; and removing the exposed portions of the spacer layer to form a plurality of line patterns on the lower hard mask layer.
Claims14
A method of forming fine line patterns, the method comprising:
- forming a plurality of lower linear core structures on at least one lower hard mask layer disposed on a target layer;
- forming a spacer layer on the lower hard mask layer to cover the lower linear core structures;
- forming an upper hard mask layer on the spacer layer;
- thinning the upper hard mask layer until potions of the spacer layer are exposed;
- and
- removing the exposed portions of the spacer layer until potions of the lower hard mask layer are exposed, so as to form a plurality of line patterns on the lower hard mask layer.
3 more elements
Dependencies are inferred from the claim text.