Low latency low video bandwidth oled display architecture
AssigneeUniversal Display Corporation
InventorMichael Hack
Life of this patent
Estimating the term…
Abstract
An OLED display architecture includes an OLED display having a plurality of pixels, a video input source, and a data link having a data transfer rate, the data link being communicatively connected to the video input source and the OLED display, where a first subset of the pixels is updated at a first refresh rate and the remaining pixels are updated at a second refresh rate. A video display system and a method of driving a display are also disclosed.
Claims24
An OLED display architecture, comprising:
- an OLED display having a plurality of pixels;
- a video input source;
- and
- a data link having a data transfer rate, the data link being communicatively connected to the video input source and the OLED display;
- wherein a first subset of the pixels is updated at a first refresh rate and the remaining pixels are updated at a second refresh rate.
8-13. (canceled)
A video display system, comprising:
- a display;
- a display video buffer communicatively connected to the display, configured to store a display video frame comprising display pixel data, the frame having a high update rate region and a low update rate region;
- a display controller communicatively connected to the display video buffer and a video input source;
- and
- a video data link configured to transmit pixel data from the video input source to the display video buffer;
- wherein the display controller is configured to update the pixel data in the high update rate region of the display video frame with the pixel data from the video input source at a first refresh rate;
- and
- wherein the display controller is configured to update the pixel data in the low update rate region of the display video frame with the pixel data from the video input source at a second refresh rate.
(canceled)
18-24. (canceled)
26-36. (canceled)
A method of driving a display, comprising the steps of:
- storing an input video frame from a video input source in an input video buffer;
- dividing the input video frame into a high update rate region and a low update rate region, each region comprising pixel data;
- transmitting the high update rate region of the input video frame to a display video buffer containing a display video frame;
- updating the pixel data in the high update rate region of the display video frame with the pixel data of the transmitted input video frame;
- and
- driving the display with the updated pixel data.
Dependencies are inferred from the claim text.