Electronic system level parallel simulation method with detection of conflicts of access to a shared memory

An electronic system-level parallel simulation method implemented by means of a multi-core computer system, said method comprising the parallel evaluation of a plurality of concurrent processes of said simulation on a plurality of logic cores of said computer system, said concurrent processes being grouped together in threads, the concurrent processes of a same thread being evaluated sequentially by a same logic core of the system, the method comprising a sub-method of detection of conflicts of access, by said concurrent processes, to a shared memory of a simulated electronic system, said sub-method being implemented by a simulation kernel executed by said computer system and comprising,

• a step of construction of an oriented graph representative of access to said shared memory by said concurrent processes;
• and
• a step of detection of cycles in said graph;
• a cycle being considered representative of a conflict of access to said shared memory;
• wherein said oriented graph comprises nodes, each representing a thread accessing a location of said shared memory, and arcs each linking two nodes, each arc representing a relationship of order of execution between the two said threads.