Allocating address space

A computer program product comprising:

• a computer readable storage medium readable by one or more processing circuits and storing instructions for execution by the one or more processing circuits for performing a method comprising:
• allocating, by the one or more processing circuits, a page of system memory address space in a computing system to a device, the allocating comprising:
• obtaining, by the one or more processing circuits, one or more base address registers of the device in a bus communicatively coupled to the one or more processing circuits;
• determining, by the one or more processing circuits, a portion of the page of the system memory address space to allocate to the one or more base address registers of the device, the determining comprising:
• sorting, by the one or more processing circuits, the one or more base address registers, in a descending order, according to alignments of the one or more base address registers;
• and
• adding, by the one or more processing circuits, sizes of the sorted one or more base address registers to determine the portion of the page;
• and
• determining, by the one or more processing circuits, a remainder of the page, wherein the remainder comprises a difference between a size of the page and the portion of the page;
• based on the remainder being greater than zero, requesting, by the one or more processing circuits, a virtual resource of a size equal to the remainder;
• and
• allocating, by the one or more processing circuits, the page to the sorted one or more base address registers and to the virtual resource.

A system comprising:

• a memory;
• one or more processing circuits in communication with the memory;
• and
• program instructions executable by the one or more processing circuits via the memory to perform a method, the method comprising:
• allocating, by the one or more processing circuits, a page of system memory address space in a computing system to a device, the allocating comprising:
• obtaining, by the one or more processing circuits, one or more base address registers of the device in a bus communicatively coupled to the one or more processing circuits;
• determining, by the one or more processing circuits, a portion of the page of the system memory address space to allocate to the one or more base address registers of the device, the determining comprising:
• sorting, by the one or more processing circuits, the one or more base address registers, in a descending order, according to alignments of the one or more base address registers;
• and
• adding, by the one or more processing circuits, sizes of the sorted one or more base address registers to determine the portion of the page;
• and
• determining, by the one or more processing circuits, a remainder of the page, wherein the remainder comprises a difference between a size of the page and the portion of the page;
• based on the remainder being greater than zero, requesting, by the one or more processing circuits, a virtual resource of a size equal to the remainder;
• and
• allocating, by the one or more processing circuits, the page to the sorted one or more base address registers and to the virtual resource.