Qc-ldpc codes

An apparatus for a wireless communication comprising:

• a processor and a memory device coupled to the processor, the memory device containing a set of instructions that, when executed by the processor, cause the processor to:
• determine a code block size (CBS) of information bits contained in a codeword of low-density parity check (LDPC) coding;
• compare the CBS with at least one threshold;
• determine, based on a result of the comparison, a Kb number;
• determine, based on a code rate and the Kb number, a Kp number;
• generate a parity check matrix of the LDPC coding, an information portion of the parity check matrix being a first matrix formed by M number of second square matrices, M being equal to Kp multiplied by Kb, a total number of columns in the Kb number of second square matrices being equal to a total number of bits of the CBS, one or more matrices of the M number of second square matrices being circular permutation matrices;
• and
• operate an LDPC encoder or an LDPC decoder based on the parity check matrix.

A tangible, non-transitory, computer-readable media having software encoded thereon, the software, when executed by a processor, operable to:

• determine a code block size (CBS) of information bits contained in a codeword of low-density parity check (LDPC) coding;
• compare the CBS with at least one threshold;
• determine, based on a result of the comparison, a Kb number;
• determining a Kp number based on a code rate and the Kb number;
• generate a parity check matrix of the LDPC coding, an information portion of the parity check matrix being a formed by M number of second square matrices, M being equal to Kp multiplied by Kb, a total number of columns in the Kb number of second square matrices being equal to a total number of bits of the CBS, one or more matrices of the M number of second square matrices being circular permutation matrices;
• and
• operate an LDPC encoder or an LDPC decoder based on the parity check matrix.