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US 2018/0323609 A1Published application
Voltage triggered edge insensitive protection circuit
AssigneeSynaptics Incorporated
InventorAbhijat GOYAL
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AssigneeSynaptics Incorporated
InventorAbhijat GOYAL
Estimating the term…
Embodiments of disclosure generally relate to integrated circuits (ICs) and, more particularly, a voltage-triggered edge-insensitive electrostatic discharge (ESD) clamp for protection of ICs. An example trigger circuit is provided for controlling a current shunt in an IC. The trigger circuit generally includes a comparison circuit configured to compare a monitored voltage to a reference voltage and output a signal indicating when the monitored voltage reaches or exceeds the reference voltage; and a shunt circuit configured to shunt the current based on receiving the signal from the comparison circuit. The voltage-triggered edge-insensitive clamp provides a single protection circuit that protects against all types of ESD and/or electrostatic overstress (EOS) events.
A trigger circuit for controlling a current shunt in an integrated circuit, comprising:
A method for controlling a current shunt in an integrated circuit, comprising:
An input device, comprising:
Dependencies are inferred from the claim text.