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US 2018/0323280 A1Published application
Self-aligned spacer for cut-last transistor fabrication
AssigneeInternational Business Machines Corporation
InventorsRuqiang Bao, Dechao Guo, Zuoguang Liu
Life of this patent
Estimating the term…
Abstract
Semiconductor devices include one or more semiconductor fins. A gate dielectric is formed over the one or more semiconductor fins. A gate is formed over the gate dielectric. A dummy gate dielectric remnant is formed adjacent to the gate dielectric. A vertical sidewall is disposed on the dummy gate dielectric remnant. The vertical sidewall has a uniform thickness along its height.
Claims20
A semiconductor device, comprising:
- one or more semiconductor fins;
- a gate dielectric formed over the one or more semiconductor fins;
- a gate formed over the gate dielectric;
- a dummy gate dielectric remnant formed adjacent to the gate dielectric;
- and
- a vertical sidewall on the dummy gate dielectric remnant, the vertical sidewall having a uniform thickness along its height.
3 more elements
A semiconductor device, comprising:
- one or more semiconductor fins;
- a vertical sidewall forming a perimeter and having a uniform thickness along its height;
- a gate dielectric formed on the one or more semiconductor fins;
- a gate formed over the gate dielectric;
- a dummy gate dielectric remnant formed directly underneath the vertical sidewall, adjacent to the gate dielectric;
- and
- a power rail in contact with the vertical sidewall.
4 more elements
A semiconductor device, comprising:
- one or more semiconductor fins;
- a silicon nitride vertical sidewall forming a perimeter and having a uniform thickness along its height;
- a high-k gate dielectric formed on the one or more semiconductor fins and on an inner side of the vertical sidewall;
- a gate formed over the gate dielectric;
- a silicon dioxide upper spacer that is formed continuous with the vertical sidewall, wherein the upper spacer and the vertical sidewall together encapsulate the gate;
- a silicon dioxide dummy gate dielectric remnant formed directly underneath the vertical sidewall and adjacent to the high-k gate dielectric;
- and
- a power rail in contact with the vertical sidewall.
5 more elements
Dependencies are inferred from the claim text.