Dual threshold voltage (vt) channel devices and their methods of fabrication

A semiconductor device comprising:

• a gate stack disposed on a substrate having a first lattice constant;
• a source region and a drain region disposed on opposite sides of the gate stack;
• and
• a channel region disposed beneath the gate stack and between the source region and the drain region, wherein the channel region comprises a first semiconductor portion having a first band gap adjacent to the source region and a second semiconductor portion having a second band gap adjacent to the drain region, the second band gap smaller than the first band gap.

A method of forming semiconductor device comprising:

• forming a first gate stack on a semiconductor substrate having a first lattice constant;
• forming a first recess on a source side of the gate stack to a first depth and forming a second recess on the drain side of the gate stack to a second depth, wherein the first depth is greater than the second depth;
• and
• forming a semiconductor material in the first recess to form a source region and forming the semiconductor material in the second recess to form a drain region, wherein semiconductor material has a second lattice constant, wherein the second lattice constant is different than the first lattice constant.

A method of forming a semiconductor device comprising:

• forming a gate stack on a semiconductor substrate, the semiconductor substrate having a first bandgap;
• implanting atoms at an angle into the substrate on a drain side of the gate stack such that the atoms are located beneath the gate stack on the drain side but not beneath the gate stack on a source side;
• and
• forming a source region on the source side of the gate stack and a drain region on the drain side of the gate stack.