Thyristor Memory Cell with Assist Device
OwnerHarry Luan, Bruce L. Bateman +2inventors
InventorsHarry Luan, Bruce L. Bateman, Valery Axelrad, Charlie Cheng
Life of this patent
Estimating the term…
Abstract
A vertical thyristor memory array including: a vertical thyristor memory cell, the vertical thyristor memory cell including: a p+ anode; an n-base located below the p+ anode; a p-base located below the n-base; a n+ cathode located below the p-base; an isolation trench located around the vertical thyristor memory cell; an assist gate located in the isolation trench adjacent the n-base wherein an entire vertical height of the assist gate is positioned within an entire vertical height of the n-base.
Claims8
A vertical thyristor memory array comprising:
- a vertical thyristor memory cell, the vertical thyristor memory cell comprising:
- a p+ anode;
- an n-base disposed below the p+ anode;
- a p-base disposed below the n-base;
- a n+ cathode disposed below the p-base;
- an isolation trench disposed around the vertical thyristor memory cell;
- an assist gate disposed in the isolation trench adjacent the n-base wherein an entire vertical height of the assist gate is disposed within an entire vertical height of the n-base.
A vertical thyristor memory array comprising:
- A vertical thyristor memory cell, the vertical thyristor memory cell comprising:
- a p+ anode;
- an n-base disposed below the p+ anode;
- a p-base disposed below the n-base;
- a n+ cathode disposed below the p-base;
- an isolation trench disposed around the vertical thyristor memory cell;
- an assist gate disposed in the isolation trench adjacent the p-base wherein an entire vertical height of the assist gate is disposed within an entire vertical height of the p-base.
Dependencies are inferred from the claim text.