Thyristor Volatile Random Access Memory and Methods of Manufacture

In a cross-point array of memory cells, each memory cell having only one thyristor, the thyristor connected between an anode line and a cathode line, a method of performing a write or read operation on a row of memory cells of the cross-point array, comprising:

• performing the write or read operation on a first group of memory cells in the row of memory cells, the first group of memory cells forming a portion of memory cells in the row, while holding the balance of the memory cells of the row in a standby state;
• performing the write or read operation on a second group of memory cells in the row of memory cells, the second group of memory cells forming a portion of memory cells and excluding the first group of memory cells in the row, while holding the balance of memory cells of the row in a Standby state;
• and
• continuing the write or read operation on remaining groups of the row of memory cells one group of memory cells at a time and excluding groups upon which the write or read operation has been performed, while holding the balance of the memory cells in the row in a standby state until the write or read operation has been performed on all groups of memory cells in the row of memory cells;
• whereby the amount of current used for the write or read operation on the row of memory cells is controlled.

In a cross-point array of memory cells, each memory cell having only one thyristor, the thyristor connected between an anode line and a cathode line, a method of storing data in the array comprising:

• providing for at least one parity bit for each word of data stored in the array;
• receiving a data word for storage in the array, the word having a first pattern of bits, the value of a bit representing whether the thyristor of a memory cell is on or off;
• encoding the at least one parity bit and the data word bits into a second pattern of bits, the second pattern of bits in a range having a restricted number of on memory cells;
• and
• storing the encoded pattern of word and parity bits in the array;
• whereby the amount of current through the data array is controlled.