Matrix-addressed tiles and arrays

A matrix-addressed tiled system, comprising:

• two or more tiles each comprising:
• a tile substrate;
• a two-dimensional array of pixels, arranged in rows and columns, disposed on the tile substrate, the array of pixels defining a contiguous pixel area of the tile substrate such that each pixel in the array of pixels is disposed within the contiguous pixel area;
• a one-dimensional array of column-data lines disposed on the tile substrate, wherein at least a portion of the one-dimensional array of column-data lines is within the contiguous pixel area and each column-data line is electrically connected to each pixel one of the columns;
• a one-dimensional array of row-select lines disposed on the tile substrate, wherein at least a portion of the one-dimensional array of row-select lines is within the contiguous pixel area and each row-select line is electrically connected to each pixel in one of the rows;
• at least one column-data line contact pad electrically connected to each of the column-data lines, each column-data line contact pad disposed at least partially within the pixel area and between at least two pixels;
• and
• at least one row-select line contact pad connected to each of the row-select lines, each row-select line contact pad disposed at least partially within the pixel area and between at least two pixels,
• wherein, for each of the two or more tiles:
• a) a column-data line contact pad on one of the two or more tiles is electrically connected to a column-data line contact pad of a different one of the two or more tiles;
• b) a row-select line contact pad on one of the two or more tiles is electrically connected to a row-select line contact pad of a different one of the two or more tiles;
• or
• c) both a) and b).

A matrix-addressed tiled system, comprising:

• a plurality of corner tiles arranged in a one- or two-dimensional array, wherein the plurality of corner tiles are not electrically connected to each other and each of the plurality of corner tiles comprises:
• a tile substrate;
• a two-dimensional array of pixels, arranged in rows and columns, disposed on the tile substrate, the array of pixels defining a contiguous pixel area of the tile substrate such that each pixel in the array of pixels is disposed within the contiguous pixel area;
• a one-dimensional array of column-data lines disposed on the tile substrate, wherein at least a portion of the one-dimensional array of column-data lines is within the contiguous pixel area and each column-data line is electrically connected to each pixel one of the columns;
• a one-dimensional array of row-select lines disposed on the tile substrate, wherein at least a portion of the one-dimensional array of row-select lines is within the contiguous pixel area and each row-select line is electrically connected to each pixel in one of the rows;
• at least one column-data line contact pad electrically connected to each of the column-data lines, each column-data line contact pad disposed at least partially within the pixel area and between at least two pixels;
• and
• at least one row-select line contact pad connected to each of the row-select lines, each row-select line contact pad disposed at least partially within the pixel area and between at least two pixels;
• a plurality of serially connected column-data circuits disposed on the tile substrate at least partially in the pixel area and between at least two pixels, each column-data circuit electrically connected to a column-data line and a column-data line contact pad;
• and
• a plurality of serially connected row-select circuits disposed on the tile substrate at least partially in the pixel area and between at least two pixels, each row-select circuit electrically connected to a row-select line and a row-select line contact pad;
• and
• a system controller electrically connected to each of the plurality of corner tiles.