Back to results
US 2018/0323169 A1Published application
Dual-sided memory module with channels aligned in opposition
AssigneeApple Inc.
InventorsJames D. Kelly, William H. Radke, Steven J. Sfarzo
Life of this patent
Estimating the term…
Abstract
Memory packages, memory modules, and circuit boards are described. In an embodiment, single channel memory packages are mounted on opposite sides of a circuit board designed with a first side also designed to accept dual channel memory packages. Alternatively, dual channel memory packages may be mounted on a first side of a circuit board that is also designed to accept single channel packages on opposite sides.
Claims28
A memory module comprising:
- a circuit board;
- at least four first packages mounted on a first side of the circuit board, each first package including a separate single channel and four ranks;
- and
- at least four second packages mounted on a second side of the circuit board directly opposite the four first packages, each second package including separate single channel and four ranks;
- wherein the circuit board further comprises four package area interconnects electrically connecting the four first packages to the four second packages, each of the package area interconnects comprising:
- a first plurality of interconnects electrically connecting power landing pads on the first side of the circuit board to power landing pads on the second side of the circuit board;
- and
- a second plurality of interconnects electrically connecting power and signal landing pads on the first side of the circuit board to power and signal landing pads on the second side of the circuit board;
- wherein the second plurality of interconnects is greater than the first plurality of interconnects.
6 more elements
(canceled)
(canceled)
A memory module comprising:
- a circuit board;
- a first memory package mounted on a first side of the circuit board, the first memory packaging including:
- a first terminal section including first power terminals and first signal terminals to operate a first plurality of memory banks contained within the first memory package;
- and
- a second terminal section including second power terminals to operate the first plurality of memory banks;
- and
- a second memory package mounted on a second side of the circuit board opposite the first side, the second memory package including:
- a third terminal section including third power terminals and second signal terminals to operate a second plurality of memory banks contained within the second memory package;
- and
- a fourth terminal section including fourth power terminals to operate the second plurality of memory banks;
- wherein the circuit board includes a section of interconnects that electrically connect the first power terminals with the fourth power terminals, and electrically connect the second power terminals with the third power terminals.
8 more elements
A memory package comprising:
- a plurality of memory banks arranged in at least two ranks;
- a first terminal section including first power terminals and first signal terminals to operate the plurality of memory banks;
- and
- a second terminal section including second power terminals to operate the plurality of memory banks;
- wherein the first terminal section includes a larger number of total electrically functional terminals and total signal terminals than the second terminal section.
2 more elements
A circuit board comprising:
- a first side including a first package landing area including a first landing pad section and a second landing pad section;
- a second side opposite the first side, the second side including a second package landing area including a third landing pad section opposite the second landing pad section and a fourth landing pad section opposite the first landing pad section;
- a first plurality of interconnects electrically connecting power landing pads contained in the first landing pad section and the fourth landing pad section;
- and
- a second plurality of interconnects electrically connecting power landing pads and signal landing pads contained in the second landing pad section and the third landing pad section;
- wherein the second plurality of interconnects is greater than the first plurality of interconnects.
3 more elements
(canceled)
A memory module comprising:
- a circuit board comprising:
- a first side including a first package landing area including a first landing pad section and a second landing pad section;
- a second side opposite the first side, the second side including a second package landing area including a third landing pad section opposite the second landing pad section and a fourth landing pad section opposite the first landing pad section;
- a first plurality of interconnects electrically connecting power landing pads contained in the first landing pad section and the fourth landing pad section;
- and
- a second plurality of interconnects electrically connecting power landing pads and signal landing pads contained in the second landing pad section and the third landing pad section;
- and
- a memory package mounted onto the first and second landing pad sections, the memory package comprising two ranks, a first channel electrically coupled with the first landing pad section, and a second channel electrically coupled with the second landing pad section;
- wherein a package is not bonded to the third landing pad section and the fourth landing pad section.
6 more elements
(canceled)
Dependencies are inferred from the claim text.