Methods of forming and operating semiconductor devices including dummy chips
AssigneeMicron Technology, Inc.
InventorsShing-Yih Shih, Neng-Tai Shih
Life of this patent
Estimating the term…
Abstract
A semiconductor device includes an interposer having a first side and a second side opposite to the first side, at least one active chip mounted on the first side within a chip mounting area through a plurality of first bumps, at least one dummy chip mounted on the first side within a peripheral area being adjacent to the chip mounting area, a molding compound disposed on the first side. The molding compound covers the at least one active chip and the at least one dummy chip. A plurality of solder bumps is mounted on the second side.
Claims20
A method of forming a semiconductor device, the method comprising:
- forming active bump pads within a chip mounting area;
- forming electrically isolated, inactive dummy pads outside the chip mounting area and within a peripheral area, the peripheral area being adjacent to and at least partially surrounding the chip mounting area;
- placing active chips on at least some of the active bump pads;
- and
- placing dummy chips on at least some of the electrically isolated, inactive dummy pads, the dummy chips being located only on the electrically isolated, inactive dummy pads within the peripheral area.
A method of forming a semiconductor device, the method comprising:
- forming active bump pads within a chip mounting area of a redistribution layer;
- connecting active chips to at least some of the active bump pads;
- and
- providing electrically isolated dummy chips outside the chip mounting area and only within a peripheral area laterally surrounding the chip mounting area on at least two sides, the electrically isolated dummy chips being mounted directly on the redistribution layer with an adhesive.
A method of operating a semiconductor device, the method comprising:
- transmitting a signal between active chips and circuitry of a redistribution layer, the active chips located on active bump pads within a chip mounting area, and the active bump pads being electrically coupled to the circuitry of the redistribution layer;
- and
- electrically isolating dummy chips from the circuitry of the redistribution layer through electrically isolated, inactive dummy pads located outside the chip mounting area and only within a peripheral area, the dummy chips located only on the electrically isolated, inactive dummy pads, and the peripheral area being adjacent to and at least partially surrounding the chip mounting area.
Dependencies are inferred from the claim text.