Integrated circuit (ic) package and package substrate comprising stacked vias

An apparatus comprising:

• a semiconductor die;
• a package substrate coupled to the semiconductor die, the package substrate including means for interconnect, the means for interconnect including:
• a first via;
• and
• a second via including a metal layer and a seed layer, the metal layer coupled to the seed layer, the seed layer coupled to the first via such that the seed layer is located between the first via and the metal layer of the second via, the second via including a different shape than the first via;
• and
• an encapsulation layer that at least partially encapsulates the semiconductor die.

A method for fabricating a device, comprising:

• providing a semiconductor die;
• coupling a package substrate to the semiconductor die, the package substrate including at least one stacked via, the at least one stacked via including:
• a first via;
• and
• a second via including a metal layer and a seed layer, the metal layer coupled to the seed layer, the seed layer coupled to the first via such that the seed layer is located between the first via and the metal layer of the second via, the second via including a different shape than the first via;
• and
• forming an encapsulation layer that at least partially encapsulates the semiconductor die.