Multi-Layer Substrate For Semiconductor Packaging
AssigneeAdvanpack Solutions Pte Ltd.
InventorsShoa Siong LIM, Hwee Seng CHEW
Life of this patent
Estimating the term…
Loading patent…
AssigneeAdvanpack Solutions Pte Ltd.
InventorsShoa Siong LIM, Hwee Seng CHEW
Estimating the term…
The present invention provides a semiconductor substrate (105, 105a) comprising two or more layers of built-up structural layers (120, 220) formed on a sacrificial carrier (110). Each built-up structural layer, comprising a conductor trace layer (114a,) and an interconnect (118a, 218a), is molded in a resin molding compound. A top surface of the molded compound is abrasively ground and then deposited with an adhesion layer (123, 124, 224). A multi-layer substrate (105, 105a) is then obtained after an outermost conductor trace layer (128a, 228a) is formed on the adhesion layer and the carrier (110) or reinforcing ring (110b) is removed.
A multi-layer semiconductor substrate comprising:
Dependencies are inferred from the claim text.