Forming interconnects with self-assembled monolayers
AssigneeIntel Corporation
InventorsAranzazu MAESTRE CARO, Ramanan V. CHEBIAM
Life of this patent
Estimating the term…
Loading patent…
AssigneeIntel Corporation
InventorsAranzazu MAESTRE CARO, Ramanan V. CHEBIAM
Estimating the term…
Embodiments of the disclosure are directed to using a SAM liner to promote electroless deposition of metal for integrated circuit interconnects. The SAM liner can be formed on a dielectric substrate. A protective layer can be formed on the SAM liner. The protective layer can double as a seed layer for electroless deposition of an interconnect metal. The interconnect metal can be deposited on the protective layer using electroless deposition. The dielectric, with the SAM liner, the protective layer, and the interconnect metal can be annealed to reflow the interconnect metal into trenches formed in the dielectric.
A device comprising:
A method of forming an interconnect, the method comprising:
A computing device comprising:
Dependencies are inferred from the claim text.