Method for Forming Stacked Nanowire Transistors
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsTung Ying Lee, Shao-Ming Yu
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Abstract
A semiconductor device includes a substrate, a first semiconductor stack including elongated semiconductor features isolated from each other and overlaid in a direction perpendicular to a top surface of the substrate, and a second semiconductor stack including elongated semiconductor features isolated from each other and overlaid in the direction perpendicular to the top surface of the substrate. The second semiconductor stack has different geometric characteristics than the first semiconductor stack. A top surface of the first semiconductor stack is coplanar with a top surface of the second semiconductor stack.
Claims20
A semiconductor device, comprising:
- a substrate;
- a first semiconductor stack including elongated semiconductor features isolated from each other and overlaid in a direction perpendicular to a top surface of the substrate;
- and
- a second semiconductor stack including elongated semiconductor features isolated from each other and overlaid in the direction perpendicular to the top surface of the substrate, the second semiconductor stack having different geometric characteristics than the first semiconductor stack, a top surface of the first semiconductor stack being coplanar with a top surface of the second semiconductor stack.
A semiconductor device, comprising:
- a substrate;
- a first nanowire stack including a first plurality of nanowires;
- and
- a second nanowire stack including a second plurality of nanowires, wherein a nanowire of the first plurality of nanowires has a different thickness than a nanowire of the second plurality of nanowires, and wherein a top surface of a top-most nanowire of the first plurality of nanowires is coplanar with a top surface of a top-most nanowire of the second plurality of nanowires.
A semiconductor device, comprising:
- a substrate;
- a first nanowire stack including a first plurality of nanowires;
- a second nanowire stack including a second plurality of nanowires, the second nanowire stack having different geometric characteristics than the first nanowire stack;
- and
- an isolation feature surrounding a portion of the substrate directly under the first nanowire stack.
Dependencies are inferred from the claim text.