Memory cell structure

A memory cell system comprising:

• a plurality of write drivers configured to write a synapse state to the synapse memory cell including a plurality of cell components each including at least one unit cell, each of the plurality of write drivers being configured to write the synapse state by writing a first set of states to a corresponding cell component of the plurality of cell components by writing a second set of states to each unit cell included in the corresponding cell component, the first and second sets each having a predetermined number of states, and the first set being dependent on the second set;
• and
• a read driver configured to read the synapse state from the synapse memory cell.

A method for fabricating a memory cell structure, the method comprising:

• arranging a plurality of write lines configured to write a synapse state to a synapse memory cell including a plurality of cell components each including at least one unit cell, each of the plurality of write lines being configured to write the synapse state by writing a first set of states to a corresponding cell component of the plurality of cell components by writing a second set of states to each unit cell included in the corresponding cell component, and the first set being dependent on the second set;
• and
• arranging a read line configured to read the synapse state from the synapse memory cell.