Data ranking apparatus and method implemented by hardware, and data processing chip

A data ranking means by using a data ranking apparatus implemented by hardware, wherein the data ranking apparatus implemented by hardware comprises:

• a register group for saving K pieces of temporarily ranked maximum or minimum data in a data ranking process, wherein K is a positive integer, the register group comprising a plurality of registers connected in parallel, and two adjacent registers unidirectionally transmit data from a low level to a high level;
• a comparator group, which comprises a plurality of comparators connected to the registers on a one-to-one basis, compares the size relationship among a plurality of pieces of input data, and outputs the data of larger or smaller value to the corresponding registers;
• and
• a control circuit generating a plurality of flag bits applying to the registers, respectively, the flag bits for judging whether the registers receive data transmitted from the corresponding comparators or lower-level registers, and judging whether the registers transmit data to higher-level registers;
• the method of ranking data comprising the following steps:
• an initializing step, in which a register group is cleared, and flag bits of a control circuit are set to be 0;
• a comparing step, in which data are input into each of comparators of a comparator group, the comparators compare input data in parallelism, and output the data of larger or smaller value to the corresponding registers;
• a registering step, in which the register group stores K pieces of temporarily ranked maximum or minimum data in a data ranking process, wherein K is a positive integer;
• and
• a controlling step, in which the control circuit modify the flag bits according to data transmission and comparison conditions, judge whether the registers receive data transmitted from the corresponding comparators or lower-level registers, and judge whether the registers transmit data to higher-level registers according to the flag bits.

A data processing chip comprising a data ranking apparatus implemented by hardware, wherein the data ranking apparatus is implemented by hardware comprising:

• a register group for saving K pieces of temporarily ranked maximum or minimum data in a data ranking process, wherein K is a positive integer, the register group comprising a plurality of registers connected in parallel, and two adjacent registers unidirectionally transmit data from a low level to a high level;
• a comparator group, which comprises a plurality of comparators connected to the registers on a one-to-one basis, compares the size relationship among a plurality of pieces of input data, and outputs the data of larger or smaller value to the corresponding registers;
• and
• a control circuit generating a plurality of flag bits applying to the registers, respectively, the flag bits for judging whether the registers receive data transmitted from the corresponding comparators or lower-level registers, and judging whether the registers transmit data to higher-level registers.

A ranking data means by using a data processing chip, wherein the data processing chip comprises:

• a register group for saving K pieces of temporarily ranked maximum or minimum data in a data ranking process, wherein K is a positive integer, the register group comprising a plurality of registers connected in parallel, and two adjacent registers unidirectionally transmit data from a low level to a high level;
• a comparator group, which comprises a plurality of comparators connected to the registers on a one-to-one basis, compares the size relationship among a plurality of pieces of input data, and outputs the data of larger or smaller value to the corresponding registers;
• and
• a control circuit generating a plurality of flag bits applying to the registers, respectively, the flag bits for judging whether the registers receive data transmitted from the corresponding comparators or lower-level registers, and judging whether the registers transmit data to higher-level registers;
• the ranking data means comprising the following steps:
• an initializing step, in which a register group is cleared, and flag bits of a control circuit are set to be 0;
• a comparing step, in which data are input into each of comparators of a comparator group, the comparators compare input data in parallelism, and output the data of larger or smaller value to the corresponding registers;
• a registering step, in which the register group stores K pieces of temporarily ranked maximum or minimum data in a data ranking process, wherein K is a positive integer;
• and
• a controlling step, in which the control circuit modify the flag bits according to data transmission and comparison conditions, judge whether the registers receive data transmitted from the corresponding comparators or lower-level registers, and judge whether the registers transmit data to higher-level registers according to the flag bits.