Processing units having triangular load protocol

A method of executing a machine instruction, comprising:

• fetching, by master processing logic, the machine instruction;
• decoding the machine instruction, at least partially, by the master processing logic;
• determining, by the master processing logic, that data is needed to execute the machine instruction;
• sending, by the master processing logic to a memory, a request to provide the data for executing the machine instruction to storage that is accessible to consumer processing logic;
• providing, by the master processing logic, at least a portion of the machine instruction to the consumer processing logic;
• receiving, from the memory, the data at the storage;
• and
• executing, by the consumer processing logic, the machine instruction using the data in the storage.

An apparatus for executing an instruction, comprising:

• a non-transitory memory storage comprising data;
• one or more processors in communication to the memory, wherein the one or more processors comprises master processing logic and at least one consumer processing logic,
• wherein the master processing logic at least partially decodes the instruction to determine whether data is needed to execute the instruction;
• provides at least a portion of the instruction to one of the at least one consumer processing logic;
• and sends a read request to the memory for the data needed, wherein the read request indicates a destination address to where the data need to be sent;
• wherein the at least one consumer processing logic receives a read response from the memory indicating the destination address to where the data need to be sent;
• wherein the one of the at least one consumer processing logic receives data from the memory and executes the at least the portion of the instruction when the destination address is corresponding to an address of the one of the at least one consumer processing logic.