Method and device for testing a chain of flip-flops
AssigneeSTMicroelectronics (Crolles 2) SAS
InventorsSylvain Clerc, Gilles Gasiot
Life of this patent
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AssigneeSTMicroelectronics (Crolles 2) SAS
InventorsSylvain Clerc, Gilles Gasiot
Estimating the term…
A chain of flip-flops is tested by passing a reference signal through the chain. The reference signal is generated from a test pattern that is cyclically fed back at the cadence of a clock signal. The reference signal propagates through the chain of flip-flops at the cadence of the clock signal to output a test signal. A comparison is carried out at the cadence of the clock signal of the test signal and the reference signal, where the reference signal is delayed by a delay time taking into account the number of flip-flops in the chain and the length of the test pattern. An output signal is produced, at the cadence of the clock signal, as a result of the comparison.
An electronic device for testing a chain of flip-flops, the electronic device comprising:
An electronic device for testing a chain of flip-flops, the electronic device comprising:
Dependencies are inferred from the claim text.