Dynamic scan chain reconfiguration in an integrated circuit

An integrated circuit (IC), comprising:

• a plurality of scan chains;
• and
• test circuitry coupled to the plurality of scan chains, the test circuitry including:
• a first circuit and a second circuit;
• and
• a scan chain router coupled between the first circuit and the plurality of scan chains and coupled between the second circuit and the plurality of scan chains, the scan chain router responsive to an enable signal to:
• (1) couple the first circuit to each of the plurality of scan chains;
• or (2) couple the second circuit to one or more concatenated scan chains, where each concatenated scan chain includes a concatenation of two or more of the plurality of scan chains.

A method of testing an integrated circuit (IC) having a plurality of scan chains, the method comprising:

• concatenating the plurality of scan chains into one or more concatenated scan chains, each concatenated scan chain including a concatenation of two or more of the plurality of scan chains;
• receiving one or more test signals from automatic test equipment (ATE);
• decompressing the one or more test signals;
• coupling each of the one or more test signals to a respective one of the concatenated scan chains;
• and
• coupling an output of each of the one or more concatenated scan chains to the ATE.