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US 2018/0294798 A1Published application
Long-distance high-speed data and clock transmission
AssigneeAvago Technologies General IP (Singapore) Pte. Ltd.
InventorsGuansheng Li, Jun Cao
Life of this patent
Estimating the term…
Abstract
A non-linear impedance terminates a transmission line. The non-linear impedance may be implemented with a back-to-back connected inverter pair. The pair acts as a non-linear resistor. A process, voltage, temperature (PVT) tracking circuit may also be provided to improve PVT tracking, with resistance of transistors locked to a calibrated resistor. The replica circuit does not appear in the signal path, and does not add capacitive load.
Claims20
A transmission line comprising:
- a signal path comprising:
- a signal propagation medium;
- and
- a termination point along the signal propagation medium;
- and
- an impedance connected at the termination point along the signal path, wherein the impedance comprises a first inverter and a second inverter, wherein a positive side transistor in the first inverter is connected to a positive side transistor in the second inverter, and a negative side transistor in the first inverter is connected to a negative side transistor in the second inverter.
3 more elements
A method comprising:
- providing a signal path in a circuit, the signal path comprising a signal propagation medium;
- and
- in the circuit, providing an impedance at a termination point along the signal path by placing a first inverter connected back-to-back with a second inverter, wherein a positive side transistor in the first inverter is connected to a positive side transistor in the second inverter, and a negative side transistor in the first inverter is connected to a negative side transistor in the second inverter.
A circuit comprising:
- a first circuit;
- a second circuit;
- a differential signal line connecting the first circuit and the second circuit;
- and
- an impedance connected across the differential signal line, wherein the impedance comprises a first inverter and a second inverter, wherein a positive side transistor in the first inverter is connected to a positive side transistor in the second inverter, and a negative side transistor in the first inverter is connected to a negative side transistor in the second inverter.
2 more elements
Dependencies are inferred from the claim text.