US 2018/0026645 A1Published application

Magnetoelectric Computational Devices

AssigneeGeorgia Tech Research Corporation

InventorsChenyun Pan, Sourav Dutta, Azad Naeemi

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Abstract

Embodiments of the present invention relate generally to logic devices, and more particularly, to magnetoelectric magnetic tunneling junction computational devices. Aspects of the disclosed technology include a stand-alone voltage-controlled magnetoelectric device that satisfies essential requirements for general logic applications, including nonlinearity, gain, concatenability, feedback prevention, and a complete set of Boolean operations based on the majority gate and inverter. Aspects of the present disclosed technology can eliminate the need for any auxiliary FETs to preset or complicated clocking schemes, and prevents the racing condition.

Claims25

Dependent claims

A semiconductor device, comprising:

an input electrode and a ground electrode configured to produce an electric field within a layer of antiferromagnetic material when a voltage is applied to the input electrode relative to the ground electrode, wherein the layer of antiferromagnetic material produces a magnetic field in response to the application of an electric field;
a first free magnet and a second free magnet, wherein the first and second free magnet are separated by a first isolation layer, wherein the first free magnet is in magnetic communication with the layer of antiferromagnetic material, and wherein the second free magnet is magnetically coupled to the first free magnet;
a permanent magnet in contact with a second isolation layer, wherein the second isolation layer is in contact with the second free magnet;
a digital voltage electrode in electrical communication with the first permanent magnet;
and
an output electrode in electrical communication with the second free magnet.

3 more elements

A semiconductor device, comprising:

a first logic gate comprising,
an input electrode and a ground electrode configured to produce an electric field within a layer of antiferromagnetic material when a voltage is applied to the input electrode relative to the ground electrode, wherein the layer of antiferromagnetic material produces a magnetic field in response to the application of an electric field,
a first free magnet and a second free magnet, wherein the first and second free magnet are separated by a first isolation layer, wherein the first free magnet is in magnetic communication with the layer of antiferromagnetic material, and wherein the second free magnet is magnetically coupled to the first free magnet,
a permanent magnet in contact with a second isolation layer, wherein the second isolation layer is in contact with the second free magnet,
a digital voltage electrode in electrical communication with the first permanent magnet, and
an output electrode in electrical communication with the second free magnet;
and
a second logic gate, comprising:
an input electrode and a ground electrode configured to produce an electric field within a layer of antiferromagnetic material when a voltage is applied to the input electrode relative to the ground electrode, wherein the layer of antiferromagnetic material produces a magnetic field in response to the application of an electric field,
a first free magnet and a second free magnet, wherein the first and second free magnet are separated by a first isolation layer, wherein the first free magnet is in magnetic communication with the layer of antiferromagnetic material, and wherein the second free magnet is magnetically coupled to the first free magnet,
a permanent magnet in contact with a second isolation layer, wherein the second isolation layer is in contact with the second free magnet, and
a digital voltage electrode in electrical communication with the first permanent magnet;
and
an output electrode in electrical communication with the second free magnet;
wherein the input electrode of the first logic device is in electrical communication with the antiferromagnetic layer of the first logic device, and the ground electrode of the first logic is in electrical contact with the first free magnet of the first logic device;
wherein the input electrode of the second logic device is in electrical communication with the first free magnet of the second logic device, and the ground electrode of the second logic device is in electrical contact with the antiferromagnetic layer of the second logic device;
and
wherein the output electrode of the first logic device is in electrical communication with the output electrode of the second logic device.

15 more elements

A semiconductor device, comprising:

a logic component, comprising:
an input electrode and a ground electrode configured to produce an electric field within a layer of antiferromagnetic material that produces a magnetic field in response to the application of an electric field,
a free magnet and a permanent magnet, wherein the free magnet and permanent magnet are separated by a magnet isolation layer, wherein the free magnet is in magnetic communication with the layer of antiferromagnetic material and
an output electrode in electric communication with the permanent magnet;
a bias component, comprising:
a first pre-set electrode and a second pre-set electrode configured to produce an electric field within a layer of antiferromagnetic material that produces a magnetic field in response to the application of an electric field,
a free magnet and a permanent magnet, wherein the free magnet and the permanent magnet are separated by a magnet isolation layer, wherein the free magnet is in magnetic communication with the layer of antiferromagnetic material, and
an output electrode in electric communication with the permanent magnet,
wherein the output electrode of the bias component is in electrical communication with the output electrode of the logic component;
wherein the logic component is configured to be pre-set by applying a ground voltage to the first pre-set electrode and a pre-set voltage to the second pre-set electrode;
wherein the logic component is configured to be operable by applying an operating voltage to the second pre-set electrode, and a voltage approximately double the operating voltage to the first pre-set electrode, wherein the operating voltage has an opposite polarity from the pre-set voltage.

8 more elements

Dependencies are inferred from the claim text.

Facts

Application: 15/654,278Filed 19 Jul 2017
Priority: 19 Jul 2016
Published: 25 Jan 2018
Term ends: Not estimatedThe source records don’t support an estimate.

Classification14 codes

H03K 19/20
Logic circuits, i.e. having at least two inputs acting on one output ; Inverting circuits: characterised by logic function, e.g. AND, OR, NOR, NOT…
H01F 10/14
Being metals or alloys: containing iron or nickel
H01F 10/16
Being metals or alloys: containing cobalt
H01F 10/3218
Spin-exchange-coupled multilayers, e.g. nanostructured superlattices: exchange coupling of magnetic films via an antiferromagnetic interface

Family

Application62/363,876Us provisional application · filed 19 Jul 2016
US 9,979,401 B2Related patent
US 2018/0026645 A1This patent

From the US filing history. Foreign family members aren’t listed.

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