Power line layout structure for semiconductor device

Abstract

A power line layout structure of the semiconductor device may include first through fifth power lines. The first and second power lines may be located at a first layer, and may provide different types of power-supply voltages. The third power line may be located at a second layer disposed at a level different from that of the first layer. The third power line may be coupled to the first power line through a first contact, and may extend in the same direction as the first power line. The fourth power line may be located at the second layer, and may be coupled to the second power line through a second contact. The fourth power line may extend in the same direction as the second power line. The fifth power line may be disposed between the first power line and the second power line in the first layer.

Dependencies are inferred from the claim text.