Integrated circuit (ic) structure for high performance and functional density

An integrated circuit (IC) comprising:

• a semiconductor substrate;
• a first back-end-of-line (BEOL) interconnect structure and a second BEOL interconnect structure respectively under and over the semiconductor substrate;
• a first electronic device and a second electronic device between the semiconductor substrate and respectively a bottom of the first BEOL interconnect structure and a top of the second BEOL interconnect structure, wherein the first electronic device is in a bottom of the semiconductor substrate, between the semiconductor substrate and the first BEOL interconnect structure, and wherein the second electronic device is in a top of the semiconductor, between the semiconductor substrate and the second BEOL interconnect structure;
• and
• a through substrate via (TSV) extending through the semiconductor substrate, from the first BEOL interconnect structure to the second BEOL interconnect structure.

A method for manufacturing an integrated circuit (IC), the method comprising:

• forming a first back-end-of-line (BEOL) interconnect structure and a first electronic device on a bottom of a semiconductor substrate, wherein the first electronic device is between the semiconductor substrate and a bottom of the first BEOL interconnect structure;
• forming a through substrate via (TSV) extending through the semiconductor substrate to the first BEOL interconnect structure;
• and
• after the forming of the first BEOL interconnect structure, forming a second BEOL interconnect structure and a second electronic device on a top of the semiconductor substrate, wherein the second BEOL interconnect structure contacts the TSV, wherein the second electronic device is between the semiconductor substrate and a top of the second BEOL interconnect structure, wherein the forming of the second BEOL interconnect structure comprises repeatedly depositing and patterning a conductive layer on the semiconductor substrate.