Power Electronics Assemblies Having a Semiconductor Device with Metallized Embedded Cooling Channels

A power electronics assembly comprising:

• a semiconductor device stack comprising:
• a power electronic semiconductor device;
• a first electrode electrically and thermally coupled to a first device surface of the power electronic semiconductor device;
• and
• a second electrode electrically and thermally coupled to a second device surface of the power electronic semiconductor device;
• a substrate layer coupled to the semiconductor device stack, wherein the substrate layer comprises a substrate inlet port and a substrate outlet port;
• an integrated fluid channel system extending between the substrate inlet port and the substrate outlet port of the substrate layer, wherein the integrated fluid channel system comprises:
• a substrate fluid inlet channel extending from the substrate inlet port into the substrate layer;
• a substrate fluid outlet channel extending from the substrate outlet port into the substrate layer;
• and
• a semiconductor fluid channel extending into the power electronic semiconductor device and positioned in fluid communication with the substrate fluid inlet channel and the substrate fluid outlet channel, wherein the semiconductor fluid channel comprises an inner surface;
• and
• a fluid channel metallization layer positioned along the inner surface of the semiconductor fluid channel of the power electronic semiconductor device.

A method of manufacturing a power electronics assembly, the method comprising:

• etching a semiconductor fluid channel into a semiconductor device, the semiconductor device having a first device surface and a second device surface and the semiconductor fluid channel having an inner surface;
• disposing a fluid channel metallization layer onto the inner surface of the semiconductor fluid channel;
• coupling a first electrode to the first device surface of the semiconductor device;
• and
• positioning the semiconductor device into fluid communication with a substrate layer comprising:
• a substrate fluid inlet channel extending from a substrate inlet port into the substrate layer;
• and
• a substrate fluid outlet channel extending from a substrate outlet port into the substrate layer, wherein the substrate fluid inlet channel and the substrate fluid outlet channel are each in fluid communication with the semiconductor fluid channel.