One-time programmable memory device

A one-time programmable (OTP) memory device, comprising:

• a data input circuit that receives a supply voltage and applies the supply voltage to one of a plurality of bit line that is selected by a write switch;
• an OTP memory cell array comprising a plurality of OTP memory cells arranged in a plurality of rows and columns, the OTP memory cells arranged on the same row connected to the same bit line;
• a column decoder that selects one of the plurality of columns of the OTP memory cells to apply the supply voltage thereto;
• a power selection circuit that receives the supply voltage from a supply voltage pad and provides the supply voltage to the data input circuit and the column decoder;
• and
• an address decoder that shifts a level of a power voltage to generate the supply voltage, and pre-decodes the level-shifted supply voltage.

A one-time programmable (OTP) memory device, comprising:

• a plurality of OTP memory cells arranged in a plurality of rows and columns;
• a plurality of bit lines, each bit line connected to the OTP memory cells on the same row;
• a data input circuit that applies a supply voltage to one of the plurality of bit lines;
• and
• a column decoder that applies the supply voltage to one of the plurality of columns of the OTP memory cells,
• wherein a programming operation is performed on the OTP memory cell that is on the column applied with the supply voltage and connected to the bit line applied with the supply voltage.