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US 2018/0025773 A1Published application
Precharging and refreshing banks in memory device with bank group architecture
AssigneeIntel Corporation
InventorsKuljit S. BAINS, John B. HALBERT, Nadav BONEN, Tomer LEVY
Life of this patent
Estimating the term…
Abstract
Memory subsystem refresh management enables commands to access one or more identified banks across different bank groups with a single command. Instead of sending commands identifying a bank or banks in separate bank groups by each bank group individually, the command can cause the memory device to access banks in different bank groups. The command can be a refresh command. The command can be a precharge command.
Claims21
1-26. (canceled)
A dynamic random access memory (DRAM) device comprising:
- multiple banks of memory addressable by bank group identifier and by bank identifier;
- interface hardware to couple to multiple signal lines of a command and address bus;
- and
- logic to identify a signal pattern at the interface hardware as a same bank command including a bank identifier and not including a bank group identifier, the logic to apply the same bank command to banks identified by the bank identifier across multiple different bank groups.
1 more element
A system comprising:
- a memory controller to manage refresh of associated memory devices;
- and
- multiple memory devices coupled to the memory controller, wherein a memory device includes
- multiple banks of memory addressable by bank group identifier and by bank identifier;
- interface hardware to couple to multiple signal lines of a command and address bus;
- and
- logic to identify a signal pattern at the interface hardware as a same bank command including a bank identifier and not including a bank group identifier, the logic to apply the same bank command to banks identified by the bank identifier across multiple different bank groups.
4 more elements
Dependencies are inferred from the claim text.