Apparatuses and methods including nested mode registers
AssigneeMicron Technology, Inc.
InventorsKallol Mazumder, William O'Leary
Life of this patent
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Abstract
Apparatuses and methods for nested mode registers to extend mode register functionality are disclosed. An example apparatus comprises a mode register configured to store address information and write data, a plurality of nested mode registers coupled to the mode register and configured to store the write data, and a decoder circuit coupled to the mode register and the plurality of nested mode registers and configured to selectively enable a nested mode register of the plurality of nested mode registers to store the write data based, at least in part, on the address information.
Claims25
An apparatus comprising:
- a first mode register configured to store mode register address information and mode register data;
- a plurality of second mode registers coupled to the first mode register and configured to store the mode register data;
- and
- a decoder circuit coupled to the first mode register and the plurality of second mode registers and configured to selectively enable a second mode register of the plurality of second mode registers to store the mode register data based, at least in part, on the mode register address information.
An apparatus comprising:
- a first mode register configured to store a set of mode register data and mode register address information;
- a plurality of second mode registers coupled to the mode register, the plurality of second mode registers configured to store a first subset of the set of mode register data based, at least in part, on a second subset of the set of mode register data.
A method comprising:
- storing, in a mode register, mode register data and address information;
- decoding, with a decoder circuit, to the address information to identify a nested mode register;
- responsive to identifying the nested mode register, storing the mode register data in the nested mode register.
A method comprising:
- storing, in a mode register, mode register address information and mode register data;
- decoding, with a decoder circuit, the mode register address information to identify a second mode register of a plurality of second mode registers;
- providing an enable signal to the identified second mode register;
- and
- responsive to providing the enable signal, storing the mode register data in the identified second mode register.
Dependencies are inferred from the claim text.