Void avoidance verifications for electronic circuit designs
AssigneeHewlett Packard Enterprise Development LP
InventorsElene Chobanyan, Karl J. Bois
Life of this patent
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AssigneeHewlett Packard Enterprise Development LP
InventorsElene Chobanyan, Karl J. Bois
Estimating the term…
A system may include an input engine and a void avoidance engine. The input engine may access an electronic circuit design of an electronic design automation (EDA) tool as well as identify a first net and a second net in the electronic circuit design. The void avoidance engine may perform a void avoidance verification scan to determine whether the first net, the second net, or both, are within a threshold distance from any voids in the electronic circuit design. The void avoidance engine may also generate a double violation alert responsive to a determination that the first net and the second net are both within the threshold distance from a particular void in the electronic circuit design and that the first net and the second net are located on different sides of the same plane of the electronic circuit design.
A system comprising:
A method comprising:
A non-transitory machine-readable medium comprising instructions executable by a processing resource to:
Dependencies are inferred from the claim text.