Allocating physical pages to sparse data sets in virtual memory without page faulting
AssigneeAdvanced Micro Devices, Inc.
InventorsTimour T. Paltashev, Christopher Brennan
Life of this patent
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AssigneeAdvanced Micro Devices, Inc.
InventorsTimour T. Paltashev, Christopher Brennan
Estimating the term…
A processing system for reduction of a virtual memory page fault rate that includes a first memory to store a dataset, a second memory to store a subset of the dataset, and a processing unit. The processing unit is configured to receive a memory access request including a virtual address and determine whether the virtual address is mapped to a first physical page in the first memory and or a second physical page in the second memory. The processing unit maps a third physical page in a free page pool of the second memory to the virtual address in response to the virtual address not being mapped to the second physical page. The processing unit also grants access to the third physical page that is mapped to the virtual address.
A method for reduction of a virtual memory page fault rate in a system that includes a first memory to store a dataset and a second memory to store a subset of the dataset, the method comprising:
An apparatus comprising:
An apparatus comprising:
Dependencies are inferred from the claim text.