Memory system storing block protection information
AssigneeToshiba Memory Corporation
InventorsShunsuke KODERA, Kenichirou KADA, Shinya TAKEDA, Kiyotaka HAYASHI, Yoshio FURUYAMA, Tetsuya IWATA, Wangying LIN
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AssigneeToshiba Memory Corporation
InventorsShunsuke KODERA, Kenichirou KADA, Shinya TAKEDA, Kiyotaka HAYASHI, Yoshio FURUYAMA, Tetsuya IWATA, Wangying LIN
Estimating the term…
A memory system includes a controller that recognizes, as a command, a signal received immediately after a chip select signal is received from a host device, and a memory that includes a plurality of blocks. When the command is a first command, the controller outputs to the host device, information indicating whether at least one of a write operation and an erase operation with respect to at least one particular block is prohibited.
A memory system comprising:
A memory system comprising:
A method of operating a memory system including a nonvolatile semiconductor memory having a plurality of blocks and an interface connected to a host, the interface including a first pin for a chip select signal and a second pin for a data signal, the method comprising:
Dependencies are inferred from the claim text.