Data reading method, data writing method and storage controller using the same

A data writing method, suitable for writing data from a host memory of a host system into a rewritable non-volatile memory module, wherein the rewritable non-volatile memory module is assigned with a plurality of logical blocks, the host memory has a plurality of memory pages, and the data writing method comprises:

• receiving a write command from the host system, wherein the write command comprises a starting logical block address, a number of logical blocks, a first physical region page pointer, and a second physical region page pointer, wherein the write command is configured to write target data into at least one target logical block of the rewritable non-volatile memory module, wherein a foremost logical block sorted in the at least one target logical block is a starting logical block, wherein the starting logical block address is configured to indicate an address of the starting logical block, the number of logical blocks is configured to indicate a number of the logical blocks storing the target data in the at least one target logical block, the first physical region page pointer is configured to indicate a first memory page address of the host memory, and the second physical region page pointer is configured to indicate a second memory page address of the host memory, wherein the target data corresponding to the write command is stored in at least one target memory page among the memory pages of the host memory;
• obtaining an address of each of the target memory pages respectively corresponding to the at least one target logical block according to the starting logical block address, the number of logical blocks, the first physical region page pointer, and the second physical region page pointer, wherein each of the target memory pages respectively corresponding to the target logical blocks is one of the at least one target memory page;
• and
• selecting a first target logical block from the at least one target logical block, reading first target data according to the obtained address of a first target memory page corresponding to the first target logical block, and writing the read first target data into the first target logical block.

A storage controller, configured to control a storage device having a rewritable non-volatile memory module, the storage controller comprising:

• a connection interface circuit, configured to couple to a host system, wherein the host system has a host memory, wherein the host memory has a plurality of memory pages;
• a memory interface control circuit, configured to couple to the rewritable non-volatile memory module, wherein the rewritable non-volatile memory module is assigned with a plurality of logical blocks;
• a processor, coupled to the connection interface circuit and the memory interface control circuit;
• and
• a data transfer management circuit, coupled to the processor, the connection interface circuit and the memory interface control circuit,
• wherein the processor is configured to receive a read command from the host system, wherein the read command comprises a starting logical block address, a number of logical blocks, a first physical region page pointer, and a second physical region page pointer, wherein the read command is configured to read target data from at least one target logical block of the rewritable non-volatile memory module and write the read target data into at least one target memory page of the host memory, wherein the target data is stored starting from a starting logical block in the at least one target logical block, wherein the starting logical block address is configured to indicate an address of the starting logical block, the number of logical blocks is configured to indicate a number of the logical blocks storing the target data in the at least one target logical block, the first physical region page pointer is configured to indicate a first memory page address of the host memory, and the second physical region page pointer is configured to indicate a second memory page address of the host memory,
• wherein the processor is configured to instruct the data transfer management circuit to obtain an address of each of the target memory pages respectively corresponding to the at least one target logical block according to the starting logical block address, the number of logical blocks, the first physical region page pointer, and the second physical region page pointer,
• wherein the memory interface control circuit is configured to select a first target logical block from the at least one target logical block, and read first target data stored by the first target logical block,
• wherein the data transfer management circuit is configured to write the read first target data into a first target memory page according to the obtained address of the first target memory page corresponding to the first target logical block.

A storage controller, configured to control a storage device having a rewritable non-volatile memory module, the storage controller comprising:

• a connection interface circuit, configured to couple to a host system, wherein the host system has a host memory, wherein the host memory has a plurality of memory pages;
• a memory interface control circuit, configured to couple to the rewritable non-volatile memory module, wherein the rewritable non-volatile memory module is assigned with a plurality of logical blocks;
• a processor, coupled to the connection interface circuit and the memory interface control circuit;
• and
• a data transfer management circuit, coupled to the processor, the connection interface circuit and the memory interface control circuit,
• wherein the processor is configured to receive a write command from the host system, wherein the write command comprises a starting logical block address, a number of logical blocks, a first physical region page pointer, and a second physical region page pointer, wherein the write command is configured to write target data into at least one target logical block of the rewritable non-volatile memory module, wherein a foremost logical block sorted in the at least one target logical block is a starting logical block, wherein the starting logical block address is configured to indicate an address of the starting logical block, the number of logical blocks is configured to indicate a number of the logical blocks storing the target data in the at least one target logical block, the first physical region page pointer is configured to indicate a first memory page address of the host memory, and the second physical region page pointer is configured to indicate a second memory page address of the host memory, wherein the target data corresponding to the write command is stored in at least one target memory page among the memory pages of the host memory,
• wherein the processor is configured to instruct the data transfer management circuit to obtain an address of each of the target memory pages respectively corresponding to the at least one target logical block according to the starting logical block address, the number of logical blocks, the first physical region page pointer, and the second physical region page pointer, wherein each of the target memory pages respectively corresponding to the target logical blocks is one of the at least one target memory page,
• wherein the memory interface control circuit is configured to select a first target logical block from the at least one target logical block,
• wherein the data transfer management circuit is configured to read first target data according to the obtained address of a first target memory page corresponding to the first target logical block, and the memory interface control circuit is further configured to write the read first target data into the first target logical block.