US 2018/0024171 A1 · Measuring Output Current In A Buck SMPS

Abstract

A sample and hold circuit takes a sample of the current flowing through an inductor of a buck switched-mode power supply (SMPS) at substantially the middle of the low side portion (50 percent point during low side switch ON) of the pulse width modulation (PWM) period. This sample of the current through the SMPS inductor during the low side ON 50% point may be considered as the “average” or “DC output” current of the SMPS, and taken every time at precisely the same low side ON 50%. A constant current source and sink are used to charge and discharge a timing capacitor whose voltage charge is monitored by a high speed voltage comparator to provide precise sample timing.

Claims20

Dependent claims

A method for performing current measurement in a switched-mode power supply (SMPS) having high side and low side switches coupled in series between a supply voltage and common, and a power inductor coupled between a junction of the high side and low side switches and a load, said method comprising the steps of:

charging a timing capacitor with a first constant current when the high side switch is on;
discharging the timing capacitor with the first constant current when a pulse width modulation (PWM) period reaches 50% and the high side switch is on;
discharging the timing capacitor with a second constant current when the PWM period reaches 50% and the high side switch is off, wherein the second constant current is twice the first constant current;
and
sampling the power inductor current when a voltage on the timing capacitor reaches a predetermined reference voltage.

2 more elements

A method for determining a power inductor current sample point in a buck switched-mode power supply (SMPS), comprising high side and low side switches coupled in series between a supply voltage and common, a power inductor coupled between a junction of the high side and low side switches and a load, a constant current source, a constant current sink, wherein the constant current sink has twice the current value of the constant current source, and a timing capacitor configured to be coupled with the constant current source and/or the constant current sink such that the timing capacitor is charged or discharged;

the method comprising the steps of:
when a high side switch signal from the SMPS goes to a first logic level, coupling the constant current source to the timing capacitor, whereby a voltage on the timing capacitor increases;
when the high side switch signal from the SMPS goes to a second logic level, decoupling the constant current source from the timing capacitor, whereby the voltage on the timing capacitor stays the same;
and
when a 50% pulse width modulation (PWM) period signal from the SMPS is received, coupling the constant current sink to the timing capacitor, whereby the voltage on the timing capacitor decreases twice as fast it increased when the high side switch signal is at the second logic level, and when the high side switch signal is at the first logic level the voltage on the timing capacitor decreases at the same rate as it increased;
and
comparing a voltage on the timing capacitor to generate an output signal, wherein the output signal is at a first logic level when the voltage on the timing capacitor is greater than a predetermined reference voltage, and at a second logic level when the voltage on the timing capacitor is equal to or less than the predetermined reference voltage.

4 more elements

Dependencies are inferred from the claim text.

Measuring Output Current In A Buck SMPS

Life of this patent

Measuring Output Current In A Buck SMPS

Life of this patent

Abstract

Claims20