Common mode rejection in a reservoir capacitor sar converter

A method of operating an analog to digital converter (ADC) circuit to convert an analog input voltage to a digital value, the method comprising:

• sampling an input voltage onto the ADC differentially using weighted bit capacitors of a first digital-to-analog converter (DAC) circuit of the ADC and a second DAC circuit of the ADC and applying a differential input voltage to a first comparator circuit;
• sampling a reference voltage, with respect to a reference common mode, onto weighted reservoir capacitors of the first DAC circuit and the second DAC circuit;
• converting the input voltage to a digital value using multiple bit trials of the weighted bit capacitors, wherein a bit trial of the multiple bit trials determines a bit value of the digital value by comparing an output of the first DAC circuit and an output of the second DAC circuit using the first comparator circuit, wherein the first comparator circuit has a comparator common mode offset and the differential input voltage applied to the comparator has an input common mode offset;
• and
• applying charge of one or more reservoir capacitors to one or more bit capacitors during a voltage conversion to reduce the comparator differential input voltage and reduce an error between the input common mode offset and the comparator common mode offset.

A differential successive approximation routine analog-to-digital converter (SAR ADC) circuit comprising:

• a first DAC circuit and a second DAC circuit, wherein the first and second DAC circuits include weighted bit capacitors configured to store a sampled differential input voltage and reservoir capacitors to store a sampled differential reference voltage;
• a comparator circuit configured to compare outputs of the first and second DAC circuits;
• and
• logic circuitry configured to:
• converge a differential voltage residue between outputs of the first DAC circuit and second DAC circuit towards zero volts when the input common mode voltage is intermediate the output voltage of the first DAC circuit and the output voltage of the second DAC circuit;
• and
• converge a common mode voltage residue between outputs of the first DAC circuit and second DAC circuit towards a common mode voltage of the comparator by applying charge of the reservoir capacitors to the bit capacitors during a voltage conversion when the input common mode voltage is greater than or less than both the output voltage of the first DAC circuit and the output voltage of the second DAC circuit.