Chip scale package and related methods

A method for making a semiconductor package, the method comprising:

• providing a wafer and a transparent lid;
• patterning a first material to form an inner wall on the wafer;
• patterning a second material on the transparent lid to form an outer wall;
• and
• coupling the transparent lid with the wafer at the first material and at the second material;
• wherein a modulus of the first material is lower than a modulus of the second material.

A method for forming a semiconductor package, the method comprising:

• providing a transparent lid;
• patterning a first material on the transparent lid;
• patterning a second material on the transparent lid;
• coupling a wafer to the transparent lid at the first material and at the second material;
• and
• forming one or more semiconductor packages from the wafer and the transparent lid by singulating the wafer and the glass lid;
• wherein the second material forms an outer wall at the edge of the transparent lid and the wafer and the first material forms an inner wall inside the perimeter of the outer wall at a predetermined distance from the perimeter of the outer wall;
• and
• wherein a modulus of the first material is lower than a modulus of the second material.