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US 2018/0006126 A1Published application
Mirrored contact cmos with self-aligned source, drain, and back-gate
AssigneeInternational Business Machines Corporation
InventorsTerence B. Hook, Joshua M. Rubin, Tenko Yamashita
Life of this patent
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Abstract
A semiconductor device and method of forming a semiconductor device including an inverted field effect transistor having metal filled front-side source and drain that is self-aligned and in direct contact with a metal filled back-side source and drain, wherein the device includes a metal backgate.
Claims20
A semiconductor device comprising:
- a silicon-on-insulator layer adhered to a buried oxide layer;
- at least one gate extending from the silicon-on-insulator layer;
- a first dielectric layer deposited over the at least one gate;
- a handling wafer adhered to the first dielectric layer;
- a front-side source and a front-side drain extending through a portion of the buried oxide layer and silicon-on-insulator layer;
- a second dielectric layer deposited on the buried oxide layer and the exposed portions of the front-side source and the front-side drain;
- a metal back-gate layer applied to the second dielectric layer, wherein the metal back-gate layer is not in contact with the front-side source and the front-side drain;
- a third dielectric layer deposited on the metal back-gate layer;
- a back-side source and a back-side drain extending through the second dielectric layer, wherein the back-side source is aligned and in contact with the front-side source, wherein the back-side drain is aligned and in contact with the front-side drain;
- and
- a metal back-gate contact extending through the third dielectric layer to a portion of the metal back-gate layer.
8 more elements
A method of fabricating an upside-down field effect transistor, the method comprising:
- providing a donor substrate including a silicon substrate, a buried oxide, and a single-crystal silicon-on-insulator layer;
- forming a gate extending from the silicon-on-insulator layer;
- forming a front-side source and a front-side drain in the donor substrate by etching a portion of the donor substrate and filling the etched regions with a first metal;
- depositing and planarizing a first dielectric layer over the gate, the front-side source, and the front-side drain;
- adhering the dielectric layer to a handling wafer;
- selectively removing the donor substrate to expose the buried oxide layer, a portion of the front-side source, and a portion of the front-side drain;
- depositing a second dielectric layer over the exposed buried oxide layer, the exposed portion of the front-side source, and the exposed portion of the front-side drain;
- depositing a metal back-gate layer over the second dielectric layer;
- depositing a third dielectric layer over the metal back-gate layer, the exposed portion of the front-side source, and the exposed portion of the front-side drain;
- forming a back-side source and a back-side drain in the third dielectric layer, wherein the back-side source is aligned and in contact with the front-side source, wherein the back-side drain is aligned and in contact with the front-side drain;
- and
- forming a back-gate metal contact in the third dielectric layer, wherein the back-gate metal contact is in contact with a portion of the back-gate metal layer.
9 more elements
A method of fabricating an upside-down field effect transistor, the method comprising:
- providing a donor substrate including a silicon substrate, a buried oxide, and a single-crystal silicon-on-insulator layer;
- forming a gate extending from the silicon-on-insulator layer;
- forming a front-side source and a front-side drain in the donor substrate by etching a portion of the donor substrate and filling the etched regions with a first metal;
- depositing and planarizing a first dielectric layer over the gate, the front-side source, and the front-side drain;
- adhering the first dielectric layer to a handling wafer;
- selectively removing the donor substrate to expose the buried oxide layer, a portion of the front-side source, and a portion of the front-side drain;
- depositing a second dielectric layer over the exposed buried oxide layer, the exposed portion of the front-side source, and the exposed portion of the front-side drain;
- selectively removing the second dielectric layer from contact with the buried oxide layer, a top surface of the front-side source, and a top surface of the front-side drain, wherein the second dielectric layer remains in contact with the exposed side portion of the front-side source and the exposed side portion of front-side drain;
- depositing a metal back-gate layer over the second dielectric layer;
- depositing a third dielectric layer over the metal back-gate layer, the exposed portion of the front-side source, and the exposed portion of the front-side drain;
- forming a back-side source and a back-side drain in the third dielectric layer, wherein the back-side source is aligned and in contact with the front-side source, wherein the back-side drain is aligned and in contact with the front-side drain;
- and
- forming a back-gate metal contact in the third dielectric layer, wherein the back-gate metal contact is in contact with a portion of the back-gate metal layer.
10 more elements
Dependencies are inferred from the claim text.