Power factor correction circuit and multiplier

A multiplier comprising:

• a Gilbert multiplier circuit comprising a first differential input stage, a second differential input stage and an output stage;
• said output stage outputting the output current calculated by the input of said first differential input stage and the input of the second differential input stage;
• a first differential voltage conversion circuit configured to generate a first differential voltage to bias said first differential input stage based on the received voltage signal and a first reference voltage;
• a second differential voltage conversion circuit configured to generate a second differential voltage to bias said second differential input stage based on the received voltage signal and a second reference voltage;
• and
• a bias current generating circuit configured to generate a bias current to bias a first signal conversion circuit and a second signal conversion circuit;
• wherein said output stage comprises:
• a current mirror unit comprising two current input terminals and a current output terminal;
• and
• a feedback control unit configured to ensure that the current output terminal does not output current when the voltage difference received by the multiplier is zero.