Ferroelectric Field Effect Transistors, Pluralities Of Ferroelectric Field Effect Transistors Arrayed In Row Lines And Column Lines, And Methods Of Forming A Plurality Of Ferroelectric Field Effect Transistors

A plurality of ferroelectric field effect transistors arrayed in row lines and column lines, comprising:

• individual ferroelectric field effect transistors comprising:
• a semiconductive channel comprising sidewalls and an elevationally outermost top;
• a source/drain region at opposite ends of the channel;
• and
• a gate construction comprising:
• inner dielectric extending along the channel top and laterally along the channel sidewalls;
• inner conductive material elevationally and laterally outward of the inner dielectric and extending along the channel top and laterally along the channel sidewalls;
• outer ferroelectric material elevationally outward of the inner conductive material and extending along the channel top;
• and
• outer conductive material elevationally outward of the outer ferroelectric material and extending along the channel top;
• the outer conductive material and the outer ferroelectric material being discontinuous between immediately adjacent transistors along one of a) the collective row lines, and b) the collective column lines;
• and
• the outer conductive material and the ferroelectric material being continuous between immediately adjacent transistors along the other of the collective row lines and the collective column lines.