Pcie traffic tracking hardware in a unified virtual memory system

A memory subsystem, comprising:

• an access tracking mechanism configured to track memory page accesses in a unified virtual memory system by:
• detecting a memory page access generated by a first processor for accessing a memory page in a memory system that is associated with a second processor;
• determining whether a cache memory associated with the first processor includes a first entry corresponding to an address associated with the memory page;
• if the cache memory includes the first entry, then:
• incrementing an access counter associated with the first entry that counts accesses of the memory page;
• or
• if the cache memory does not include the first entry, then:
• initializing a second entry in the cache memory to correspond to the memory page.

A computing device, comprising:

• a first processor;
• a second processor;
• and
• an access tracking mechanism configured to:
• detect a memory page access generated by the first processor for accessing a memory page in a memory system that is associated with the second processor;
• determine whether a cache memory associated with the first processor includes a first entry corresponding to an address associated with the memory page;
• if the cache memory includes the first entry, then:
• increment an access counter associated with the first entry that counts accesses of the memory page;
• or
• if the cache memory does not include the first entry, then:
• initializing a second entry in the cache memory to correspond to the memory page.