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US 2017/0371817 A1Published application
Interface circuit relating to variable delay, and semiconductor apparatus and system including the same
AssigneeSK hynix Inc.
InventorsJong Joo SHIM, Hyung Soo KIM
Life of this patent
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Abstract
A semiconductor apparatus may include an interface circuit. The interface circuit may sense level variations of a first signal and a second signal. The interface circuit may generate first and second output signals by variably delaying the first and second signals depending on a sensing result. The interface circuit may transmit the first and second output signals to first and second signal transmission lines which are adjacent to each other.
Claims19
A semiconductor apparatus comprising:
- an interface circuit configured to sense level variations of a first signal and a second signal, generate first and second output signals by variably delaying the first and second signals depending on a sensing result, and transmit the first and second output signals to first and second signal transmission lines which are adjacent to each other.
A semiconductor apparatus comprising:
- a pre-determination control circuit configured to sense level variations of a first signal and a second signal, and generate a delay control signal;
- a first crosstalk compensation circuit configured to variably delay the first signal based on the delay control signal, and generate a first output signal;
- and
- a second crosstalk compensation circuit configured to variably delay the second signal based on the delay control signal, and is generate a second output signal.
1 more element
A semiconductor apparatus comprising:
- an interface circuit configured to receive a first input signal and a second input signal transmitted through first and second signal transmission lines which are adjacent to each other, and generate first and second signals by variably delaying the first and second input signals based on level variations of the first and second input signals.
Dependencies are inferred from the claim text.