Stream based branch prediction index accelerator for multiple stream exits

A system for predicting a taken branch that ends an instruction stream in a pipelined high frequency microprocessor, the system comprising a processor configured to:

• receive a first instruction within a first instruction stream, the first instruction comprising a first instruction address;
• search an index accelerator predictor one time for the stream;
• determine a prediction for a taken branch ending the instruction stream;
• influence a metadata prediction engine based on the prediction;
• observe a plurality of taken branches that end the instruction stream;
• maintain frequency information based on the observed taken branches;
• determine, based on the frequency information, an updated prediction of the observed plurality of taken branches;
• and
• update the index accelerator predictor with the updated prediction.

A computer program product for predicting a taken branch that ends an instruction stream in a pipelined high frequency microprocessor, the computer program product comprising a computer readable storage medium having program instructions embodied therewith, wherein the computer readable storage medium is not a transitory signal per se, the program instructions executable by a processor to cause the processor to perform a method comprising:

• receiving, by a processor, a first instruction within a first instruction stream, the first instruction comprising a first instruction address;
• searching, by the processor, an index accelerator predictor one time for the stream;
• determining, by the processor, a prediction for a taken branch ending the instruction stream;
• influencing, by the processor, a metadata prediction engine based on the prediction;
• observing a plurality of taken branches that end the instruction stream;
• maintaining frequency information based on the observed taken branches;
• determining, based on the frequency information, an updated prediction of the observed plurality of taken branches;
• and
• updating, by the processor, the index accelerator predictor with the updated prediction.