Scheme to measure individually rise and fall delays of non inverting logic cells
AssigneeSTMicroelectronics International N.V.
InventorsSaurabh Kumar SINGH, Balwant SINGH
Life of this patent
Estimating the term…
Abstract
A test circuit measures both the rising edge delay and the falling edge delay associated with a logic cell. The test circuit includes a flip-flop type ring oscillator with two groups of logic cells connected in series in the oscillation path. A first multiplexor switches the ring oscillator between a rising edge and a falling edge mode. A second multiplexer causes the second group of logic cells to be included or excluded from the oscillation path. By measuring the oscillation period in the various modes, the rising edge and falling edge delays can be individually calculated.
Claims21
(canceled)
A device, comprising:
- a flip-flop;
- a test device including:
- a first output;
- a first subset of a plurality of test cells coupled to the first output;
- a second output;
- a second subset of the plurality of test cells coupled to the second output;
- a first circuit path coupled between an output of the flip-flop and the test device;
- a second circuit path coupled between an input of the flip-flop and the first and second outputs of the test device, the second circuit path including a first multiplexor having:
- a first input coupled to the first output of the test device;
- a second input coupled to the second output of the test device;
- a control input being configured to receive a mode control signal indicating a first mode or a second mode;
- and
- an output being configured to supply a signal from either the first or the second input of the first multiplexor based on the mode control signal;
- and
- a control circuit coupled to the test device, the test device configured to measure a first frequency of the first output of the test device when the first multiplexor is in the first mode, to measure a second frequency of the second output of the test device when the first multiplexor is in the second mode, and to calculate a propagation delay of a single cell of the plurality of test cells based on a difference between the first and the second frequencies, and a difference in a first number of test cells in the plurality of test cells coupled to the first output and a second number of test cells in the plurality of test cells coupled to the second output.
A device, comprising:
- a first test cell having an input and an output;
- a second test cell having an input and an output;
- a ring oscillator circuit having an output coupled to the input of the first test cell and an input coupled to the output of the first test cell in a first mode and coupled to the output of the second test cell in a second mode, the first mode having a first oscillation frequency in the first mode and having a second oscillation frequency in the second mode;
- and
- a control circuit coupled to the ring oscillator, the control circuit configured to determine a propagation delay of one of the first and second test cells based on a difference between the first and second frequencies, and based on a difference in a number of components in the first and second test cells.
A method, comprising:
- detecting a first oscillation frequency of a first circuit including a first test cell coupled to a ring oscillator;
- detecting a second oscillation frequency of a second circuit including a second test cell coupled to the ring oscillator;
- determining a propagation delay of a signal from the ring oscillator through one of the first test cell and the second test cell, the determining based on a difference between the first and second oscillation frequencies, and based on a difference in a number of components in the first and second test cells.
Dependencies are inferred from the claim text.