Transistor, semiconductor structure, and fabrication method thereof

A transistor, comprising:

• a semiconductor substrate having a fin portion;
• a dielectric layer formed on the semiconductor substrate, the dielectric layer having a gate structure recess, the gate structure recess exposing the fin portion;
• a work function layer formed:
• on a bottom and sidewalls of the gate structure recess, across the fin portion, and covering top and sidewalls of the fin portion;
• and
• a gate layer formed on the work function layer, wherein the work function layer is doped with ions by an ion implantation, wherein
• when the transistor is a PMOS transistor, the work function layer is a PMOS work function layer, the PMOS work function layer being a stacked layer of a first work function material layer and a second work function material layer, from bottom to top, and the first work function material layer being doped with first ions, the first ions include at least one of fluoride ions and aluminum ions, and
• when the transistor is an NMOS transistor, the work function layer is an NMOS work function layer, the NMOS work function layer including a work function material layer, and the work function material layer of the NMOS work function layer being doped with ions, including at least one of nitrogen ions and aluminum ions.

A method of forming a semiconductor structure, comprising:

• providing a semiconductor substrate, the semiconductor substrate having a PMOS region and an NMOS region;
• forming a first dielectric layer on the semiconductor substrate in the PMOS region, the first dielectric layer having a first gate structure recess;
• forming a second dielectric layer on the semiconductor substrate in the NMOS region, the second dielectric layer having a second gate structure recess;
• forming a PMOS work function layer on a bottom and the sidewalls of the first gate structure recess;
• forming an NMOS work function layer on a bottom and the sidewalls of the second gate structure recess;
• performing a first ion implantation on the PMOS work function layer and a second ion implantation on the NMOS work function layer;
• forming a first gate layer on the PMOS work function layer after the first ion implantation;
• and
• forming a second gate layer is formed on the NMOS work function layer after the second ion implantation.