Memory system
AssigneeToshiba Memory Corporation
InventorHiroyuki NAGASHIMA
Life of this patent
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Abstract
According to one embodiment, a memory system includes a nonvolatile semiconductor memory device, a voltage generation unit and a control unit. The nonvolatile semiconductor memory device includes a memory cell array having a plurality of blocks each including a plurality of memory cells, and a voltage generation unit configured to change a read level of the memory cell. The control unit controls write, read, and erase of the nonvolatile semiconductor memory device. The control unit changes the read level between a start of use of the nonvolatile semiconductor memory device and a timing after an elapse of a time.
Claims10
(canceled)
A memory system comprising:
- a nonvolatile semiconductor memory device including a memory cell;
- and
- a control unit configured to set a voltage supplied to the memory cell in a read,
- wherein
- the control unit is configured to set a first voltage supplied to the memory cell in a first read, and
- the control unit is configured to set a second voltage supplied to the memory cell in a second read after a lapse of a first standing time from the first read, the second voltage different from the first voltage.
Dependencies are inferred from the claim text.