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US 2017/0365305 A1Published application
Self-optimized power management for ddr-compatible memory systems
AssigneeSamsung Electronics Co., Ltd.
InventorsMu-Tien CHANG, Dimin NIU, Hongzhong ZHENG, Craig HANSON, Sun Young LIM, Indong KIM, Jangseok CHOI
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Abstract
A memory module includes a plurality of memory components, an in-memory power manager, and an interface to a host computer over a memory bus. The in-memory power manager is configured to control a transition of a power state of the memory module. The transition of the power state of the memory module includes a direct transition from a low power down state to a maximum power down state.
Claims20
A memory module comprising:
- a plurality of memory components;
- an in-memory power manager;
- and
- an interface to a host computer over a memory bus;
- wherein the in-memory power manager is configured to control a transition of a power state of the memory module, and
- wherein the transition of the power state of the memory module includes a direct transition from a low power down state to a maximum power down state.
3 more elements
A method for providing an in-memory power transition, the method comprising:
- providing an in-memory power manager in a memory module, wherein the memory module is coupled to a host computer over a memory bus;
- determining an in-memory power management scheme at initialization of the memory module;
- and
- controlling a transition of a power state of the memory module using the in-memory power manager,
- wherein the transition of the power state of the memory module includes a direct transition from a low power down state to a maximum power down state.
2 more elements
Dependencies are inferred from the claim text.