Apparatus and methods for phase synchronization of phase-locked loops

A method of phase synchronization in a frequency synthesizer, the method comprising:

• generating one or more output clock signals using a phase-locked loop (PLL);
• sampling the one or more output clock signals based on timing of a reference clock signal to generate a plurality of samples;
• generating a phase difference signal based on the plurality of samples and a tracking digital phase signal representing a phase of the PLL;
• and
• synchronizing the PLL by providing a phase adjustment that is based on the phase difference signal.

A massive multiple-input multiple-output (MIMO) system comprising:

• a plurality of frequency synthesizers configured to generate a plurality of local oscillator signals based on timing of a common reference clock signal, wherein a first frequency synthesizer of the plurality of frequency synthesizers comprises:
• a phase-locked loop (PLL) configured to generate one or more local oscillator signals of the plurality of local oscillator signals;
• a sampling circuit configured to generate a plurality of samples by sampling the one or more local oscillator signals based on timing of the common reference clock signal;
• a phase difference calculation circuit configured to generate a phase difference signal based on the plurality of samples and a tracking digital phase signal representing the phase of the PLL;
• and
• a phase adjustment control circuit configured to provide a phase adjustment to the PLL based on the phase difference signal.