Multi-stage frequency dividers and poly-phase signal generators

A 4-phase signal generator for generating 4 phase signals with individual phases, wherein the 4-phase signal generator comprises a first clock signal input, a second clock signal input and four outputs, and the 4-phase signal generator further comprises:

• a first electronic latch circuit and a second electronic latch circuits;
• wherein
• the first input of the first electronic latch circuit is connected to the first output of the second electronic latch circuit;
• the second input of the first electronic latch circuit is connected to the second output of the second electronic latch;
• the first input of the second electronic latch circuit is connected to the second output of the first electronic latch circuit;
• the second input of the second electronic latch circuit is connected to the first output of the first electronic latch;
• the first clock signal input is connected to the clock signal input of the first electronic latch circuit;
• the second clock signal input is connected to the clock signal input of the second electronic latch circuit;
• the first output is connected to the first output of the first electronic latch circuit;
• the second output is connected to the second output of the first electronic latch circuit;
• the third output is connected to the first output of the second electronic latch circuit;
• and
• the fourth output is connected to the second output of the second electronic latch circuit.

A multistage frequency divider comprising:

• a first stage comprising a 4-phase signal generator;
• and
• a plurality N of cascaded stages, each stage comprising 2N−1 branches, wherein N=2, 3, . . . ;
• and wherein each branch comprises:
• an electronic latch circuit;
• and
• a first 4-phase signal generator;
• and wherein in each branch:
• the first and second inputs of the electronic latch circuit is connected to a pair of the output signals at the outputs of the 4-phase signal generator in the stage preceding it;
• and
• the first and second outputs of the electronic latch circuit is connected to the first and second clock signal inputs of the first 4-phase signal generator in the same branch;
• and the clock signal input of the electronic latch circuit is connected to the first or second clock signal input of the 4-phase signal generator in the stage preceding it.

A poly-phase signal generator for generating a plurality of 2N+1 phase signals with individual phases, wherein the poly-phase signal generator comprises:

• a multistage frequency divider;
• and
• a plurality of 2N+1 output logic circuits;
• and the multi-phase signal generator is configured to:
• generate a plurality of 2N+1 phase signals at the outputs of each output logic circuit by gating output signals from the outputs of each 4-phase generator in the Nth stage, wherein N=2, 3, 4, . . . .

An 8-phase signal generator for generating 8 phase signals with individual phases, wherein the 8-phase signal generator comprises:

• a multistage frequency divider, wherein N=2;
• and
• 8 output logic circuits;
• and the 8-phase signal generator is configured to:
• generate 8 output signals with a frequency of fCLK/4 at the outputs of each 4-phase generator in the 2nd stage, wherein the 8 output signals are adjacent to each other with 45 degree phase difference;
• and
• generate the 8 phase signals at the outputs of each output logic circuit by gating one output signal with its adjacent output signal and with the signal which has 180 degree phase difference to the adjacent output signal.

An 8-phase signal generator for generating 8 phase signals with individual phases, wherein the 8-phase signal generator comprises:

• a multi-stage frequency divider, wherein N=2, so that the 8-phase signal generator comprises 2 stages and the 2nd stage comprises 2 branches and each branch comprises two 4-phase signal generators;
• and
• 8 output logic circuits, each output logic circuit comprises a NOR gate;
• and the 8-phase signal generator is configured to:
• generate 16 output signals with a frequency of fCLK/4 at the outputs of each 4-phase generator in the 2nd stage, wherein the 16 output signals are adjacent to each other with 45 degree phase difference;
• and
• generate the 8 phase signals at the outputs of each output logic circuit by:
• NOR gating the outputs from the first 4-phase signal generators in each branch;
• and further
• NOR gating the outputs from the second 4-phase signal generators in each branch.

A 16-phase signal generator for generating 16 phase signals with individual phases, wherein the 16-phase signal generator comprises:

• a multi-stage frequency divider, wherein N=3, so that the 16-phase signal generator comprises 3 stages and the 2nd stage comprises 2 branches, the 3rd stage comprises 4 branches;
• and
• 16 output logic circuits;
• and wherein the 16-phase signal generator is configured to:
• generate 16 output signals with a frequency of fCLK/8 at the outputs of each 4-phase generator in the 3rd stage, wherein the 16 output signals are adjacent to each other with 22.5 degree phase difference;
• and
• generate the 16 phase signals at the outputs of each output logic circuit by gating one output signal with its adjacent output signal and with the signal which has 180 degree phase difference to the adjacent output signal.

A 16-phase signal generator for generating 16 phase signals with individual phases, wherein the 16-phase signal generator comprises:

• a multi-stage frequency divider, wherein N=3, so that the 16-phase signal generator comprises 3 stages, wherein the 2nd stage comprises 2 branches and the 3rd stage comprises 4 branches and wherein each branch in the 3rd stage comprises two 4-phase signal generators;
• and wherein
• the 16-phase signal generator is configured to:
• generate 32 output signals with a frequency of fCLK/8 at the outputs of each 4-phase generator in the 3rd stage, wherein the 32 output signals are adjacent to each other with 22.5 degree phase difference;
• and
• generate the 16 phase signals by gating two adjacent output signals.